Intel Starts Shipping High-NA EUV Silicon
In April 2024 I pulled on a bunny suit at Intel’s D1X fab in Hillsboro, Oregon, and stood a few feet from a machine the size of a bus and worth a small nation state. Intel Fellow Mark Phillips explained this was ASML’s first High-NA EUV scanner, 165 tons of it. Installation had just wrapped and calibration had begun, but realistically still another few months before test wafers could be run. Intel were actually only a few weeks ahead of ASML in terms of installing a tool, enabling a close collaboration between the two.
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In April 2024 I pulled on a bunny suit at Intel’s D1X fab in Hillsboro, Oregon, and stood a few feet from a machine the size of a bus and worth a small nation state. Intel Fellow Mark Phillips explained this was ASML’s first High-NA EUV scanner, 165 tons of it. Installation had just wrapped and calibration had begun, but realistically still another few months before test wafers could be run. Intel were actually only a few weeks ahead of ASML in terms of installing a tool, enabling a close collaboration between the two.
Source: morethanmoore.substack.com (197 points, 79 comments) Hacker News discussion
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